Minnesaddressering med 32bitars addressbuss

Trädvy Permalänk
Aug 2005

Minnesaddressering med 32bitars addressbuss

Det finns 32 addresspins, så gränsen för hur mycket minne den borde kunna addressera (och klara av) ligger vid (2^32)/10^9 Gigabytes eller (2^32)/10^6 Megabytes

I real mode segmented model som används i en del gamla processorer går man förbi den spärren på ett fult sätt:

In real mode segmented model we resolve some of the limitations of real
mode flat model but at the same time create some complexities. In real mode we
are in fact “given” one megabyte of memory by the operating system. In real
mode flat model we can only access 64K of that because of the 16-bit limitation.
In segmented model we are not so constrained. Segments are a somewhat
complex concept but hopefully you will understand them relatively quickly
(relative to what you ask…well, how about quantum physics). The segmented
model works like this.
First we have our original 16-bit address which can provide us with
enough addresses for 64K of memory. We call this one segment. Next we have
one 4-bit address, stored in another register, to designate were the segment
starts in our one megabyte of memory. Our segment registers, SS, CS, DS, ES,
FS, and GS take care of that. Our offset registers, SI, DI, and often also AX, BX,
CX, and DX take care of the addresses within the segment. So really, real mode
flat model is just segmented model without using the segment registers. This
doesn’t mean you can switch between the two models mid-program. You must
specify what you will be using first and then stick to it. ”

Processor Address Bus Size Data Bus Size Initial Clock Rate
|- -> 8008 16 8 1Mhz
|real mode segmented model
|---> 8088 20 (1Mb) 8 4.77Mhz
8086 20 16 4.77Mhz
80286 24 (16Mb) 16 8-12Mhz
80386 32 (4Gb) 16 16-33Mhz
80486 32 (4Gb) 32 33-66Mhz

frågan är: GÅR det att använda mer än 4gb minne simulant med en 32bits cpu i praktiken?

den teoretiska möjligheten är konstaterad (som vanligt)..

(defmacro lisp-bootstrap (expr) expr)